Summary

• The most dangerous unlocks happen in DC read-out. A lower threshold on B1p would not help with those, but a lower threshold on OMC transmission might
• Further down the list, a threshold of 1W on SDB1 is much safer than a threshold of 2W on SDB1.
• This year there has been already ~10 of these dangerous flashes (mostly in March), and they had up to 900W impinging on the OMC, 4W in transmission, and 1.3kW resonating inside the cavity.

I have tried to do a more systematic study of all the unlock flashes since March.

Figure 1 shows the B1p PD2 trend calibrated into power on SDB1 (mutlipied by 10e3). The red crosses correspond to what would be the maximum power if the fast shutter was triggered at 2W on the bench, and the black pluses at 1W on the bench (in CARM null up to two weeks ago the threshold was 40W on the bench if I am not mistaken. There have been a few other cases where the max power is ~150W (threshold at which the shutter of the photodiode closes, so it is just a lower limit).

Figure 2 is a histogram of these results. The brightest 4 flashes would be as dangerous with a threshold of 1W or 2W on SDB1 to trigger the fast shutter. It would have only an impact on the bulk of the distribution, having less flashes exceeding 30W, but not stopping these brightest cases.

The brightest case is the one from Aug 30. The next 3 are

Figure 3 with OMC locked, and DARM DC read-out, March 25

Figure 4 with OMC locked and DARM DC read-out, another one March 25

Figure 5 with OMC locked and DARM DC read-out, March 30

Figure 6 This one is very different, in RF read-out. A 2W threshold lets it go up to 150W, while a 1W threshold stops at 1W, as there was an oscillation for many seconds on B1p before that transient.

Figure 7 also in RF readout. A 2W threshold lets it go up to 80W, one a 1W threshold stops it at 1W, as there is a few waves in the 100ms before this flash that go slightly above 1W.

Figure 8 also in RF readout. A 2W threshold lets it go up to 60W, one a 1W threshold stops it at 1W, as there was an oscillation for many seconds on B1p before that transient.

Figure 9, 10 and 11 Looking back at the trend data of B1pP. The flashes in March reported above had 2500 counts, which correspond to ~500W on SDB1, and there was even a few more earlier in March, that had 4500 counts, so about 900W on SDB1.

/users/mwas/OMC/OMCflashSafety_20220923/flashAnalysis.m

Figure 1-4 show the 4 examples of powerful flashes in OMC read-out. In all cases LSC_DARM moves beyond the +/-0.001 range more than 10ms before the bright part of the flash. So this could be an excellent trigger for the OMC fast shutter.

Figure 5 shows an example CARM null lock, and after a few minutes LSC_DARM is well within +/-0.001. Once the dither lines are reduced to prepare for OMC lock, there is even a factor 10 of margin with fluctuations staying within +/-1e-4 on LSC_DARM.

Figure 1 and 2 shows two lock acquisition, DARM stays within +/-0.02 during the last two steps of CARM offset reduction. This could be a threshold to use to trigger the fast shutter during the lock acquisition end stages when there can be powerful flashes.

Figure 3, 4 and 5 shows the most dangerous DARM RF unlocks in the last 6 months. In all cases a +/-0.02 threshold on DARM would have allowed to close the fast shutter in 10ms, well before the bright flash arrives on SDB1.

This is a more systematic check of using DARM absolute value for triggering the fast shutter over 6 months of data.

Figure 1 shows the histogram of the power on SDB1, using a 0.02 and 0.0015 threshold on DARM. The 0.0015 threshold cuts the max power to 20W. With an 0.02 threshold there is a dozen of flashes that go beyond 100W, and a few that arrive at the PD saturation of 150W (so could be brighter than that).

Figure 2 shows that the red cross (threshold of 0.02) in most cases are well below the peak recorded power (blue line), so a threshold of 0.02 on DARM would be much better than what we do right now during lock acqusition

Figure 3 and 4 are one of the flashes that is not stopped by the 0.02 threshold. Figure 3 is B1p PD2, which almost reaches the PD saturation of 15mW, and the trigger on DARM of 0.02 (figure 4), would be due to the glitch, which happens 10ms before the peak power on B1p PD2, so marginally too late.

Figure 1 shows a time when SR was well aligned (high DCP frequency but also high B1p fluctuations). During that time DARM stays within +/-1.5e-3, so the trigger on the fast shutter at 1.5e-3 could work well in these conditions. There are periods of a few minutes where DARM is at +/-1e-3, I expect this is during DARM noise injection to check the DCP. There are a few glitches on DARM that get very close to +/-1.5e-3.