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AdV-COM (AdV commissioning (1st part) )
Allocca, Bersanetti, Swinkels, Trozzo - 2:36 Sunday 22 January 2017 (36143) Print this report
Locking shift

We spent most of the shift re-tuning the gains for the loops, which for some reason were changed with respect to the previous locking shift.

Bas has tested a new online monitor to better tune the demodulation phase. More details about it will be posted in a dedicated entry tomorrow.

Here is some more detail about the shift:

  • At the beginning we had problem holding the lock when engaging the SSFS, and we succeded having a stable situation by decreasing the SSFS gains in the CARM_DARM init file as suggested in 36140. The currenty starting gains are: b4_gain = 25, dsp_gain = 7.0. It happened again (as reported in 36132)  that after an unlock the SSFS_B4_Corr_DSP signal didn't go to 0, and as suggested by Alain we had to reset and reload the SSFS_Ctrl process.
  • Initially the MICH loop didn't hold the lock, maybe because of the windy day, so we decided to remove the boost and the situation was improved.
  • Since the z position of the mode cleaner drifts pretty quickly, we performed FModErr every time that the drift was greater than 2 mm. After each FModErr it seems that the SSFS error signal is cleaner and less glitchy. However the glitches come up again as soon as we lock PRCL.
  • In order to cure this SSFS oscillations, we tried to tweak the loop gains. However, since there are two loop gains to be changed (one for the low frequency and one for the high frequency filter) it's not straightforward to find the right ratio between the two, which doesn't seem to be constant. Looking at the transfer function of the CARM error signal can give an indication about the range of the crossover between the two loops, but it's not immediate to tweak the gain online with this method. If we are not mistaken, in the SSFS control process there are only the low frequency RTPC filters, so it's difficult to make a full loop model and reconstruct the loop itself
  • Due to the instabilities, we could not go further than half fringe tonight with PRITF.

At the end of the shift the NE controls opened because of the strong wind, but Lucia managed to close them back.

We leave the ITF in Recombined state for the night.

Comments to this report:
swinkels - 14:48 Monday 23 January 2017 (36161) Print this report
As a quick tests, I added some temporary signals to LSC_Acl for demodulating the PRCL line in B2_18MHz. We tried a few times to make a scan of the phase B2_18MHz_phi0, but the interferometer could not stay locked long enough with PR aligned. The same was therefore done using the DARM line in B7_6MHz (with ITF_LOCK in state LOCKED_SSFS), which allowed us to do a full scan. At first, the demodulation was done with a low-pass filter of 2 Hz, but the signals were too noisy. Lowering the frequency to 20 mHz, the signals started to make sense. Note that are two demodulations: first the photodiode signal is demodulated at 6MHz yielding the usual two signals. These are then both demodulated at the line frequency of 41.1 Hz. This gives four signals II, IQ, QI and QQ, which are plotted in figure 1. During the scan, the vector of the demodulated line in B7_6MHz_I stays relatively stable, at an angle that is determined by the closed-loop transfer function of the loop at the frequency of the line. The vector of the line demodulated in B7_6MHz_Q passes trough the origin during the scan of the demodulation phase.

Some basic math shows that the error in the demodulation phase is given by dphi = atan((II*QI + IQ*QQ) / (II^2 + IQ^2)). An offline calculation is shown in figure 2, the scan is well visible and the slope seems correct. The vertical offset between phi0 and the measured phase might hint that the demodulation phase was mistuned by about 7 degrees.

I have ACL code ready for calculating this online. This might be added for B2_6MHz and B2_18MHz using the PRCL line, and for B7/B8_6MHz using the DARM line. To do something similar for B4, we would need a permanent line on the SSFS (maybe the old 1111 Hz), but it is not clear what would be the best ACL process to do this.
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