What I found more surprising is that the 28kHz line used for the lock of the OMC is very clearly visible, see fig 2 and 3. It even completely dominates the RMS above 8Hz! I don't know if this is bad or not, but we can at least stop worrying about applying high frequency dithering to suppress ADC noise ...
We have observed that a line at high frequency allow to reduce the non-linear noise of the ADC, but the RMS of the line should equal or greater the low frequency part RMS to minimize this noise.
An other way to reduce this non-linear noise introduced by the ADC7674 chip itself, it 's the use of shaping with high gain.