This morning, the OMC was not locking due to a mistuning of the OMC error signal demodulation phase, which was found to be wrong by ~90 deg.
The demodulation phase of B1_PD3 was adjusted to 3.4 rad (previous value was 1.85 rad). After reloading the external configuration at 07h45m54 utc, the OMC was able to lock on the TEM00 at first attempt.
Assuming that the demodulation phase for the B1_PD2 photodiode would be affected in the same way, we also adjusted the B1 demodulation phase from -0.6 rad to 0.97 rad. The new demodulation phases have been recorded in the main configuration file of process SDB1_OMC.
We also noticed that the offset of the B1_PD3 photodiode was quite large. The offset was retuned and we reloaded the configuration of SDB2_dbox_bench at 08h05m03-UTC (see attached figure).