After the end of the afternoon shift I worked on the recovery of the lock acquisition:

• I basically had to do nothing to lock up to CARM_NULL_1F, so whatever was impairing the lock today may very well still be there, I just did not encounter it; the only thing I did was to change the MICH/SRCL demodulation phase for the DRMI 1F, which reduced the MICH/PRCL coupling and (hopefully) improved a bit the acquisition success ratio;
• OMC could lock just fine, as in previous attempts, but today the SR LCs were much more stable, so that probably also helped; once the OMC locked, B1_PD3_DC was around 30 uW; I recommissioned the full DC readout (ISC-wise) but the numbers were not dramatically different; a full automated lock acquisition up to LOCKED_DC_READOUT has been already tested, as a first attempt towards LOW_NOISE_1 failed;
• at the second attempt LOW_NOISE_2 was reached, and I spent some time doing a first tuning of the SR alignment in this phase (which uses different signals with respect to CARM_NULL_1F and wasn't recovered yet after the shutdown); this tuning is definitely not final, but I could get an improvement on the DCP, although the sensitivity at high frequency is still bad (Figure 1);
• LOW_NOISE_3 worked with no issue, as it only reduces a few lines, increases the SDB1 angular loop gains and enables the 50 Hz feedforward.