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AdV-SGD (FDS commissioning)
bawaj, guo, vardaro - 22:33 Friday 05 August 2022 (56656) Print this report
SQZ_FLT: bugfix and preparation for a long test run

We successfully ported PyPllServer to the default cmt-conda environment.

After that, we prepared an automation branch (dev-mb_220805_for_long_run) adjusted to the long test run. With respect to the currently most updated dev-mb branch it contains changes:
- PySQZ_IR is enabled all the time
- LFC_UGF decorator is disabled (verify if this decorator or LOCK_FLAG creates a problem in case of lock at low GR transmission).

In the process we realized that a measurement of the IR AA sensing matrix might be necessary. We made an attempt but due to the presence of strong wind we were not successful. On the other hand we dedicated time to write down the sensing matrix measurement algorithm which you can find beneath.

The automation was started at (useful data since) 1343766188 05 Aug 2022 20:22:50 UTC

IR AA sensing matrix measurement procedure

Prerequisites:

  1. Cavity is AOM_LOCKED_IR, (IR_AA is off).
  2. Demodulation Phase of the error signals must be correct.
  3. Error signal noise below: ?
  4. IR Galvos must be ON and OK

Actuators

  • EQB2_IR_QD1_RF_11MHz_X
  • EQB2_IR_QD1_RF_11MHz_Y
  • EQB2_IR_QD2_RF_11MHz_X
  • EQB2_IR_QD2_RF_11MHz_Y

Error signals

  • EQB1_IR_M3_MT1_X
  • EQB1_IR_M3_MT1_Y
  • EQB1_IR_M5_MT1_X
  • EQB1_IR_M5_MT1_Y

Steps:

  1. Put the offset on one actuator (command is in VPM)
  2. Wait one second
  3. Read average values of all error signals
  4. Invert the offset on the actuator
  5. Wait one second
  6. Read average values of all error signals (detrend?)
  7. Calculate the differences between the two readouts and divide by the difference in offsets.
  8. Put results to the matrix column.
  9. Repeat steps from 1-8 for other three actuators.
  10. Invert the measured matrix
Comments to this report:
vardaro - 0:28 Monday 08 August 2022 (56679) Print this report

The automation worked well up to 14:48 UTC of 7th August, then the filter cavity unlocked and started to lock/unlock up to 15 UTC see Fig1. A detailed entry to this behaviour will follow/

After that we experienced an INJ unlock and the ITF ML set point moved by about 0.3V (see Fig2). After that the PLLs were no more able to lock thus I had to tune the SQZ laser set point to lock the PLL in this working point (new set points in Fig3). Then I realigned the Green beam and the IR beam to the filter cavity and I re engaged the automation at 21:45 UTC see Fig4.

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vardaro, bawaj - 17:22 Monday 08 August 2022 (56689) Print this report

After the restore of yesterday the Automation worked well up to 6:15 UTC of this morning. Here the cavity unlocked and was not more able to relock again (fig1) . We did the following observation:

  • after the unlock the system fall in down and discharged the correction of all the mirrirs (FCIM, FCEM GR_M5 and GR_M7) but some kicks to the mirror occured. After that the transmission was at 4V maximum (fig2)
  • the threshold for the lock was set at 6.2 V thus the system did not relock on green anymore
  • sometimes after the lock on green we noticed a lot of frequency noise and the BPC2 based on dither lines on FCIM and FCEM did not work well. 

To solve it we are implementing the following solutions:

  • increase the SQZ_CC_Ctrl GAIN from 0.12 to 0.5 to reduce frequency noise (temorary bug fixing)
  • lower the threshold for engage the lock on green from 6.2 to 5 i.e. the 75% of the maximum transmission
  • insert in the green+IR locking a state to re-align the green if the transmission is too low, because in that condition it is difficult to find the IR
  • try to discharge the mirrors correction without sending kicks to the actuators. A possible solution is tested (fig 3).

We are impementing these upgrades in the SQZ_FLT.py code and tomorrow we will test them. 

Note that other unlocks were triggered by other issues in the automation. These kind of unlocks was less critical thus we started from the bigger problem

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vardaro - 12:16 Tuesday 09 August 2022 (56695) Print this report

After an FMODERR this morning I had to recover the PLL settings of two days ago i.e. move back by 600 bit the PLL MAIN and CC and by 1100 the SC PLL. 

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