This morning  the demodulation of the SDB2_B1p_QD{1,2} signals at 50MHz has been setup .

To allow this :

• In agreement with the ISC team the SDB2_B1p_QD_{1,2}  demodulation at 18MHz has been removed
• The fpga demodulation frequency has been set  to exactly 8 times the one use to demodulate the 6MHz  to allow the DAQ-LNFS phase correction with the  8*6 MHz phase extracted at the LNFS level .

The channels SDB2_B1p_50MHz_{H,V}_{I,Q} are sent to the ASC_Acl server  . The ASC_Acl server has been upgraped to acquire these new channels , of course the SDB2_B1p_18MHz_{H,V}_{I,Q}  channels have been removed.

Only the demodulation mezzanines acquiring the SDB2_B1p_QD{1,2}  channels have been reconfigured : as consequence only the  SDB2_B1p_QD{1,2}_XMHz phases have to be adjusted.