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AdV-ISC (Commissioning up to first full interferometer lock)
boldrini, casanueva, mantovani - 16:20 Thursday 08 April 2021 (51354) Print this report
ISC shift: CITF lock attempt

The goal of today's shift was the verify whether B5 QPD could be used to align the beam splitter.
Unfortunately, we could not managed to lock the CITF at all, despite numerous attempts of improving the alignment of the mirrors. It seems that, every time a trigger shows up, the control loops of the three DoFs attempt to lock but fail after a few fractions of a second (Fig.1). We tried to change the absolute value of the loops' gains in order to allow for a lock, but none of the value we experimented allowed the CITF to lock.

Around 12:00:00 UTC timing failed, and we spent some time afterwards to recover the demodulation phases for B7/8_6MHz and the CITF error signals: B2 demodulated at 6, 56 and 18 MHz
The new phases are:

  • B7_6MHz: 0.65 rad
  • B8_6MHz: -0.78 rad
  • B2_6MHz: 1.2 rad
  • B2_56MHz: 2.0 rad
  • B2_18MHz: -1.2 rad

B2_169MHz phase was impossible to tune without locking the CITF.
As a last attempt we tried changing the signs on the control loops, to no significative effects.

We leave the interferometer as it is, with the SR and PR aligned and the ETMs misaligned, to allow for the continuation of the recovery in the next ISC shift.

Images attached to this report
Comments to this report:
letendre, masserot - 21:49 Thursday 08 April 2021 (51358) Print this report

The timing shifted by our fault. We inserted an optical transceiver in the DaqBox that monitors the timing. This DaqBox is located in the "timing" rack, in the DAQ Room. This action should not shift the timing, but maybe we touched a sensitive cable, or an ESD discharge could be the source of the problem.

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