This morning we took advantage of the maintenance to make a couple of measurements to try to understand why lately we have been forced to change the crossing point of the SSFS.
The first measurement done was of the transfer function of the slow loop that controls the length of the IMC with the RFC as error signal (Figure 1). The loop was behaving correctly, even if the UGF was slightly low, it was 135Hz, but we can push it up to 180Hz.
The next measurement done was the same trasnfer function but when we use the B4 error signal coming from the SSFS, CARM2MC (Figure 2). This time we saw something strange, since the phase was crossing cero around 190Hz, which is too close to the target UGF, 180Hz. Indeed, the loop oscillated around 175Hz when unlocking several times. If we compare with measurements done in the past we can see that we have lost phase margin, see entry #41595.
The only difference between both loops os the error signal used, so we need to understand where is the extra delay. Alain measured the delay between the Error sginal used at the MC DSP and the one demodulated by the SSFS, and the delay is 200us higher now, while doing the same thing between the error signal used at the MC DSP and the one demodulated at SIB2 there is no extra delay.
We have relocked the ITF like this, but more investigation sare ongoing to try to understand the origin of the extra delay.