There was the following DBoxes with the timing_error not at zero , this appeared around 08h50m-UTC for most of them:
- EDB_DBOX_OMC (SN075) and EDB_DBOX_SQZ(SN120) managed by the EDB_QD_dbox_rack server
- Related to EDB_DBOX_SQZ(SN120), the demodulation board SN38 (mezzanine3) appeared as not available for the DaqBox server, but was weel reachable from the DBox ARM CPU
- from the DBox ARM CPU; the command /home/daqbox/virgo/App/DaqBox/v8r3/scripts/daqbox_main_fpga_reset.sh was executed and after the the faultymezzanine was recovered
- The reconfiguration of these DBoxes allowed to recover the synchronization with the Timing system
- Related to EDB_DBOX_SQZ(SN120), the demodulation board SN38 (mezzanine3) appeared as not available for the DaqBox server, but was weel reachable from the DBox ARM CPU
- SQB1_DBOX_Up (SN103) and SQB1_DBOX_Up(SN104) managed by the SQB1_dbox_bench server
- the LC and SBE SQB1 controls were openned
- The reconfiguration of these DBoxes alloweed to recover the synchronization with the Timing system
- the LC and SBE SQB1 controls were successfully closed after these operations
- EQB1_DBOX_03 (SN091) managed by the SQB1_dbox_rack server and the SQZ_DBOX_O2 managed by the SQZ_DBOX_DET_EERoom server
- The reconfiguration of these DBoxes allowed to recover the synchronization with the Timing system
After these operations, all the faulty DBOxes are synchronized as well the FAST_DAC mezzanines . The attached plot show the trend of the issues
