Today we pursued the recovery of the ITF with 26 W of input power; this first part of the day was devoted to the restoration of Lock Acquisition and the DC Readout path, while the fine tuning of alignment and the DAS actuators has been scheduled for later today; anyhow, here are the actions performed on the detector:

• I took the chance to revisit (hopefully) all of the thresholds and parameters which are power dependent:
  • thresholds on RFC and IMC power;
  • Guided Lock thresholds for the arms;
  • locking thresholds for PRCL and MICH;
  • hard threshold on B7_DC for the general safety trigger on LSC_ENABLE;
  • general thresholds on B7/B8 for initial CARM/DARM;
• no issues were observed about B4_PD2, as it always re-opened after a lockloss; the same automatic opening has been added for B5_PD1;
• some troubles were observed while closing the RFC loop, with the usual alignment oscillations occasionally triggering; I slightly updated the demodulation phase of SIB2_RFC_6MHz and, more importantly, changed RFC_GAIN on the MC card from 0.069 to 0.08; those actions seemed to improve the situation a bit, to be confirmed by the experts;
• the SQZ was quite misbehaving, often falling in DOWN and/or taking a long time to reach the REST_POSITION; for this reason, the debug flag is still True and we forced SQZ_MAIN to be in DOWN all the time;
• ASC_Acl has been restarted, so all the components of the new trigger are now online; thresholds have not been updated yet;
• some tuning was done on MICH_LOCK and PRCL_LOCK for the initial settings for the two DOFs;
• after the first general tuning this morning, I found that the demodulation phase for SSFS/MICH was way off, so the first lock in LOW_NOISE_1 is not completely meaningful;
• after a few turning on/off of the TCS Central Heating we decided to automate it (from around 11:00 UTC); since it is just a couple of commands, this is done in ITF_LOCK as for other external processes (LNFS, Coils Relay Boxes); what happens now is the following:
  • in the DOWN state we turn the CH on, with the commands cm_send('TTL_co2','SETRELAY',byte) where byte = 3 for WI and byte = 7 for NI;
  • this means that the Central Heating is for the time being turned on everytime we go to DOWN, including: Maintenance, Troubleshooting, Calibration (if it does not end up in LOCKED_PRITF_DF), alternative locking configurations (SHORT_MICH, PR-*I, CITF, etc...);
  • in the LOCKED_PRITF_DF state we turn the CH off, with the commands cm_send('TTL_co2','RESETRELAY',byte) with the same 'bytes' as above;
• now the PRCL line for the UGF monitor is turned on as soon as we close the PRCL loop in LOCKED_PRITF (MICH_SET = 0.7);
• most of the tuning of the gains happened during Variable Finesse, with very little happening before the PR realignment; some details:
  • the CARM2MC loop gain has been tuned, but now it has the new feature of spoling the NArm power and cleaning the WArm one at the same time; the engagement of the SSFS brings everything back to the usual state;
  • the PRCL lock after the realignment of the PR mirror has failed a couple of times, so I lowered the thresholds on B4_DC to allow a quicker engagement of the loop; strangely enough, this happened only in the second part of the day;
  • most of the gains of all the LSC loops had to be tuned for all the way down to Dark Fringe;
• once in fake LOW_NOISE_1 (without the SSFS boost) a first tuning of the alignment working point was done; also the gains for DIFFp, PR and COMMp were tuned (all of them were increased);
• DC Readout path:
  • the initial DARM offset (on B1p_56MHz) has been increased to 0.016 (from 0.011) and renamed in ITF_LOCK.ini as "darm_offset_rf"; the (lower) DARM offset we apply once OMC1 has locked and DARM is moved to B1s2_DC has been moved to the [OMC1_LOCK] section and renamed as "darm_offset_dc"; this should hopefully remove some confusion; in [DC_READOUT] the same darm_offset (without the _dc suffix) has been kept, in case of need of a different offset along the way, but it is uneffective as of now;
  • the UGF lines for MICH and PRCL are, for the time being, kept on at all times; comment/uncomment the zero/non-zero amplitudes in [DC_READOUT] to revert this;
  • since the new MICH filter has a different gain with respect to the old one and the UGF drops to 4 Hz between OMC1 and OMC2, I did non want to push our luck any further and I added a MICH gain adjustment after the lock of OMC1;
  • now, OMC1 locks with B1s2 ~ 1.5 mW as before, then after the DARM RF->DC hand-off the new darm_offset_dc is applied and B1s2_DC ~ 0.3 mW; then, OMC2 locks with B1_DC ~ 2.25 mW;
  • in LOW_NOISE_3, DARM offset and gain have been updated in order to have the same B1_DC (~ 1.4 mW) and the same UGF (~93 Hz) as before;
  • the PRCL->SSFS feed-forward has been roughly checked (mainly for its effects on the PRCL loop) and re-engaged, although its performance may have to be re-evaluated; both gains for PRCL (FF on/off) have been updated.
• The Dark Fringe/LOW_NOISE_1 part has basically no statistics yet, so it may need some further tuning, mainly for the SSFS boost issue;
• the ITF has been left to the evening crew for the tuning of the ASC/TCS working points.