After the relock, we noticed an excess of frequency noise in Hrec (the usual step after 3.5kHz).

We tried to optimize the alignment working point in order to reduce it, but unfortunately this action didn't seem to have any effect on it.

We changed:

• DIFFp_TX from -0.02 to -0.04
• BS_TX from 0.003 to 0.0005
• BS_TY from 0.002 to 0.0005
• PR_TX from 0.007 to 0.009

Although these offsets seemed to improving the sidebands and reduce the fringe, they were not saved in the ITF_LOCKini file, because the transition from DC READOUT to LN3 was not tested, and being some of the offsets significantly different, we would risk to unlock in the transition.

Maybe replacing these offsets would need a dedicated commissioning time.

Still no effect on the high frequency step.